Contributions from Grenoble

list of bibtex entries

[Dim02]
Catalin Dima,
Computing Reachability Relations in Timed Automata,
LICS, 2002.
T2.3

[ACM02]
E. Asarin, P. Caspi, O. Maler,
Timed Regular Expressions,
Journal of the ACM 49, No.2, 2002, 172-206
T1.1

[AM02]
Y. Abdeddaïm, O. Maler,
Preemptive Job-Shop Scheduling using Stopwatch Automata
in J.-P. Katoen and P. Stevens (Eds.), Proc. TACAS 2002.
T1.4

[BJMY02]
M. Bozga, H. Jianmin, O. Maler, S. Yovine,
Verification of Asynchronous Circuits using Timed Automata
in E. Asarin, O. Maler and S. Yovine (Eds.) Proc. TPTS'02, ENTCS 65
T3.5
@inproceedings{Bozga-Jianmin-Maler-02,
author = {M.~Bozga and H.~Jianmin and O.~Maler and S.~Yovine},
title = {Verification of Asynchronous Circuits using Timed Automata},
booktitle = {Proceedings of TPTS'02 Workshop},
year = {2002},
month = {April},
publisher = {Elsevier}
}

[MKM02]
O. Maler, B. Krogh, M. Mahfoudh,
On Control with Bounded Computational Resources
in W. Damm and E-R Olderog (Eds.) Proc. FTRTFT'02 147-164, LNCS 2469, Springer, 2002.
T1.3, T1.5, T2.2

[MNAM02]
M. Mahfoudh, P. Niebert, E. Asarin, O. Maler,
A Satisfiability Checker for Difference Logic,
Proc. SAT 2002.
T2.3

[NMABJ02]
P. Niebert, M. Mahfoudh, E. Asarin, M. Bozga, N. Jain, O. Maler,
Verification of Timed Automata via Satisfiability Checking
in W. Damm and E-R Olderog (Eds.) Proc. FTRTFT'02 225-244, LNCS 2469, Springer,
2002.
T2.3

[AAM03]
Y. Abdeddaïm, E. Asarin, O. Maler,
On Optimal Scheduling under Uncertainty
in H. Gargamel and J. Hatcliff (Eds.), Proc. TACAS 2000, 240-255, LNCS 2619, Springer, 2003.
T1.4, T1.5, T2.2, T2.4

[AKM03]
Y. Abdeddaïm, A. Kerbaa, O. Maler
Task Graph Scheduling using Timed Automata
in Proc. FMPPTA 2003.
T1.4

[Abd02]
Yasmina Abdeddaïm,
Scheduling with Timed Automata,
PhD Thesis, INPG, Grenoble, November 2002
T1.3, T1.4, T1.5, T2.2

[Mah03]
Moez Mahfoudh,
On Satisfaiblity Checking for Difference Logic,
PhD Thesis, UJF Grenoble, submitted Mars 2003.
T2.3

[Boz03]
M. Bozga,
Timed Automata Approach for the AXXOM Case Study,
internal report, Verimag, 2003
T3.4

[Mal03]
O. Maler,
Scheduling with Choice and Parallelism,
in preparation, 2003.
T1.4, T1.5, T2.2

[AD02]
E. Asarin and C.Dima,
Balanced timed regular expressions.
In MTCS'2002, Brno, Czech Republic, August 2002, ENTCS 68, issue 5.
T1.1

[SSY03]
J. Sifakis, S. Tripakis, S. Yovine.
Building models of real-time systems from application software,
Proceedings of the IEEE, Special issue on modeling and design of embedded, 91(1):100-111, January 2003.
T1.2, T1.5, T2.1, T2.2

[AGS02]
K. Altisen, G. Goessler, J. Sifakis,
Scheduler modeling based on the controller synthesis paradigm,
Journal of Real-Time Systems, special issue on "Control Approaches to Real-Time Computing", 23, 55-84, 2002.
T1.5, T2.2

[KY03]
Ch. Kloukinas, S. Yovine,
Synthesis of Safe, QoS Extendible, Application Specific Schedulers for Heterogeneous Real-Time Systems.
In Proceedings of "5th Euromicro Conference on Real-Time Systems (ECRTS'03)", Porto, Portugal, July 2003.
T1.5, T2.2, T3.5

[BGM02]
M. Bozga, S. Graf, L. Mounier
IF-2.0: A Validation Environment for Component-Based Real-Time Systems
In Ed Brinksma, K.G. Larsen (Eds.) Proceedings of CAV'02 (Copenhagen, Denmark) LNCS vol. 2404 Springer July 2002
T2.5
@inproceedings{Bozga-Graf-Mounier-02,
author =3D {M.~Bozga, S.~Graf, L.~Mounier},
title =3D {IF-2.0: A Validation Environment for
Component-Based Real-Time Systems},
booktitle =3D {Proceedings of CAV'02 (Copenhagen,
Denmark)},
pages =3D {343-348},
year =3D {2002},
editor =3D {Ed Brinksma, K.G.~Larsen},
volume =3D {2404},
series =3D {LNCS},
month =3D {July},
publisher =3D {Springer}
}

[Tri02a]
S. Tripakis,
Fault Diagnosis for Timed Automata.
In FTRTFT, 2002.
T2.1

[Tri02b]
S. Tripakis,
Description and Schedulability Analysis of the Software Architecture of an Automated Vehicle Control System,
In EMSOFT,
2002.
T3.5

[AT02]
K. Altisen and S. Tripakis,
Tools for Controller Synthesis of Timed Systems,
In RT-TOOLS'02.
T1.5, T2.2